The electron linear accelerator ELBE consists of two electron injectors and multiple user beamlines that can be partly operated in parallel. An important sub-system of the machine is the timing signal generation and distribution which controls electron bunch emission, beamline diagnostic and user experiments on the picosecond timing level. The system needs to be capable for continuous operation which demands a technology readiness level of TRL-8 (“System completed and qualified through test and demonstration”). This call aims for the development, integration and commissioning of a timing system at the ELBE center for high-power radiation sources. The system should contain of a central timing master unit which has interfaces to the ELBE control system and machine protection system. The ELBE control system is based on Siemens PLCs and uses WinCC v7.3 for visualization.
Vergabekammer des Bundes
Vergabekammer des Bundes
+49 2289499-163Main CPV code 31643000
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14 Sep 20180 days remaining
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The timing master has to generate flexible timing signals that are variable in frequency, duty cycle, delay and number of cycles. Logical combinations of timing signals should be used to derive advanced trigger output signals. Minimum ten receiver stations need to be connected to the timing master via electrically isolated links. The receiver stations must generate user defined pulse patterns on a scalable number of physical outputs (electrical and optical) based on the timing master configuration. The system must be maintainable and extendable by the machine staff in terms of number of receiver stations, physical outputs, timing signals and their configuration.
Minimum Hardware requirement:
Max. trigger rate: 26 MHz
Delay step size: 200 ps
Pulse duration step size: 200 ps
Min. delay range / minimum signal period: 300s
Max. trigger jitter [1 Hz, half trigger frequency] for best performing output type: < 30 ps RMS
Reference clock frequency: 1300 SRF-Accelator; 13 MHz master oscillator
Resynchronization frequency (parameter set/update, counter/divider reset): 10 Hz (Draco), 1 Hz (Penelope)
Different Output Logic Level: TTL, (LV)PECL
Minimum number of timing client stations: 10
Minimum number of different independent output signals per Client: 10
Minimum Software Requirement
All the sources of the development that are needed to maintain, extend or modify the system, in particular hardware design files, firmware sources and software program code, must be provided to the purchaser. The development must be documented in an appropriate manner for the different system components like program code comments, block diagrams, component lists and functional descriptions.
Description of optionsUsed Hardware components as spare part
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